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hifive1_rev_b

HiFive1 Rev B

The SiFive HiFive1 Rev B is a SBC funded on Crowd Supply featuring the Freedom Everywhere FE310-G002 RISC-V processor capable of being clocked at 320+ MHz.

Documentation
Boot

The FE310-G002 jumps to 0x2001_0000 in the external SPI Flash memory on the HiFive1 Rev B. The FE310-G002 can boot from other sources, controlled by the Mode Select (MSEL[1:0]) pins. The default value appears to be 01, which is a jump to 0x2000_0000 in external SPI Flash. It may also be defaulting to 10, a jump to the OTP (One-Time Programmable) memory at 0x0002_0000, which could then jump to one of the previous locations in external Flash. The other two options are 11 for the fixed mask ROM, which contains an instruction at 0x0001_0000 to jump to the OTP memory, and 00, which jumps to 0x0000_1004 and loops forever waiting for a debugger.

hifive1_rev_b.txt · Last modified: 2019/04/19 00:14 by weilawei